Wipro Hiring for VLSI Senior Engineer – AMS Layout



Company name : Wipro
Post Name : VLSI Senior Engineer – AMS Layout
Post Details : Floor planning, DRC/LVS verification and fixReliability Analysis and fix, implementationHandling team, customer interaction, debugging skillsInteracting with vendors for support and closingGood communication skillsHands-on experience with Cadence/Synopsys
Qualification : BE/B Tech/MCA/MTech/MSc
Experience : 4 to 6 years
Requirements : Industry experience in 20nm/28nm IO cell/standard cell/analog/custom digital/Standard cell layoutGood understanding of analog concepts along with experience in layout/Mask design of complex analog circuitsWorked in Layout of any one of the following is required : Power Management blocks, PLL, PHY, LDO, high performance ADCs, high speed IO’s or Standard cells, integration and taking the block from specification to releaseDeep understanding of reliability analysis in layout like EM, IR drop, latch-up, ESD etc.Should have experience in leading the team and setting up the pdk environment
Location Bangalore

Send your Resume to the following mail:

[email protected]

Post Published On Site Date : 17-6-2014